M. .Ziccardi, .Cornaglia, A., .Mezzetti, E., and .Vardanega, T., “Software-enforced Interconnect Arbitration for COTS Multicores”. WCET 2015, 2015.

C. Maxim, Cucu-Grosjeans, L., and Triquet, B., “Rare events and worst-case execution times”. RTSOPS 2014, 2014.

E. Mezzetti, Ziccardi, M., Vardanega, T., Abella, J., Quinones, E., and Cazorla, F. J., “Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems”. Leibniz Transactions on Embedded Systems (LITES), 2015.

S. Altmeyer, Cucu-Grosjean, L., Davis, R. I., and Lesage, B., “Progress on static probabilistic timing analysis for systems with random cache replacement policies”. RTSOPS 2014, 2014.

E. Diaz, Abella, J., Mezzetti, E., Agirre, I., Azkarate-askasua, M., Vardanega, T., and Cazorla, F. J., “Mitigating the Instrumentation Overhead of Measurement-Based Timing Analysis”. WCET 2016, 2016.

L. Kosmidis, Compagnin, D., Morales, D., Mezzetti, E., Quinones, E., Abella, J., Vardanega, T., and Cazorla, F. J., “Measurement-Based Timing Analysis of the AURIX Caches”. WCET 2016, 2016.

G. Fernandez, Abella, J., Quinones, E., Rochange, C., Vardanega, T., and Cazorla, F. J., “Contention in multicore hardware shared resources: Understanding of the state of the art”. WCET 2014 workshop, 2014.

I. Agirre, Azkarate-askasua, M., Larrucea, A., Perez, J., Vardanega, T., and Cazorla, F. J., “Automotive Safety Concept Definition for Mixed-Criticality Integration on a COTS Multicore”. SASSUR 2016, 2016.

B. Lesage, Griffin, D., Davis, R., and Altmeyer, S., “On the application of Static Probabilistic Timing Analysis to Memory Hierarchies”. RTSOPS 2014, 2014.

J. Perez, “Safety certification of cross-domain mixed-criticality systems (Current research status, certification authority assessments and lessons learnt)”. ARTEMIS Technology Conference 2015, 2015.

S. Altmeyer, Cucu-Grosjean, L., and Davis, R., “Static probabilistic timing analysis for real-time systems using random replacement caches”, Real-Time Systems, vol. 51, pp. 77-123, 2015.

L. Kosmidis, Quinones, E., Abella, J., Vardanega, T., Hernandez, C., Gianarro, A., Broster, I., and Cazorla, F. J., “Fitting Processor Architectures for Measurement-Based Probabilistic Timing Analysis”, 2016.

“PROXIMA: A Probabilistic Approach to the Timing Behaviour of Mixed-Criticality Systems”, ADA USER JOURNAL, vol. 35, no. 2. pp. 118-122, 2014.

L. Santinelli and Cucu-Grosjean, L., “A probabilistic calculus for probabilistic real-time systems”. ACM Transactions on Embedded Computing Systems, 2015.

D. Griffin, Lesage, B., Burns, A., and Davis, R. I., “Static Probabilistic Timing Analysis of Random Replacement Caches using Lossy Compression”, Real-Time Networks and Systems (RTNS). 2014.

B. Lesage, Griffin, D., Altmeyer, S., and Davis, R. I., “Static Probabilistic Timing Analysis for Multi-path Programs”. In proceedings 36th Real-Time Systems Symposium (RTSS 2015), 2015.

D. Griffin, Lesage, B., Bate, I., Soboczenski, F., and Davis, R. I., “Modelling Fault Dependencies when Execution Time Budgets are Exceeded”. In proceedings 23rd International Conference on Real-Time Networks and Systems (RTNS 2015), pp. 129-138, 2015.

D. Griffin, Lesage, B., Burns, A., and Davis, R. I., “Lossy Compression for Worst-Case Execution Time Analysis of PLRU Caches”, Real-Time Networks and Systems (RTNS). 2014.

B. Lesage, Griffin, D., Bate, I., Soboczenski, F., and Davis, R. I., “A Framework For The Evaluation Of Measurement-based Timing Analyses”. In proceedings 23rd International Conference on Real-Time Networks and Systems (RTNS 2015), pp. 35-44, 2015.

J. Abella, del Castillo, J., Cazorla, F. J., and Padilla, M., “Extreme value theory in computer sciences: The case of embedded safety-critical systems”. 6th International Conference on Risk Analysis (ICRA), 2015.

J. Abella, Hernandez, C., Quinones, E., Cazorla, F. J., Conmy, P. Ryan, Azkarate-askasua, M., Perez, J., Mezzetti, E., and Vardanega, T., “WCET Analysis Methods: Pitfalls and Challenges on their Trustworthiness”, SIES 2015, 2015.

C. Hernandez, Abella, J., Cazorla, F. J., Andersson, J., and Gianarro, A., “Towards Making a LEON3 Multicore Compatible with Probabilistic Timing Analysis”, DASIA 2015, 2015.

M. S. (BSC), (BSC), L. K., Abella, J., Quinones, E., and Cazorla, F., “Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments”, in Special Issue on Harsh Chips, 2014.

F. Wartel, Kosmidis, L., Gogonel, A., Baldovin, A., Stephenson, Z., Triquet, B., Quinones, E., Lo, C., Mezzetti, E., Broster, I., Abella, J., Cucu-Grosjean, L., Vardanega, T., and Cazorla, F. J., “Timing Analysis of an Avionics Case Study on Complex Hardware/Software Platforms”, in DATE, 2015.

M. Slijepcevic, Kosmidis, L., Abella, J., Quiñones, E., and Cazorla, F. J., “Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems”, in Proceedings 51st Design Automation Conference San Francisco DAC 2014 , California, 2014.