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Publications

Found 2 results
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Filters: Author is Leonidas Kosmidis (BSC)  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
P
L. K. (BSC), Quinones, E., Abella, J., Vardanega, T., Broster, I., and Cazorla, F. J., “Probabilistic Timing Analysis and Its Impact on Processor Architecture”, 2014.
T
M. S. (BSC), (BSC), L. K., Abella, J., Quinones, E., and Cazorla, F., “Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments”, in Special Issue on Harsh Chips, 2014.

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