L. K. (BSC), Quinones, E., Abella, J., Vardanega, T., Broster, I., and Cazorla, F. J., “Probabilistic Timing Analysis and Its Impact on Processor Architecture”, 2014.

L. Santinelli and Cucu-Grosjean, L., “A probabilistic calculus for probabilistic real-time systems”. ACM Transactions on Embedded Computing Systems, 2015.

S. Milutinovic, Quinones, E., Abella, J., and Cazorla, F. J., “PACO: Fast Average-Performance Estimation for Time-Randomized Caches”, 52nd Design Automation Conference (DAC), 2015.

S. Milutinovic, Abella, J., and Cazorla, F. J., “Modelling Probabilistic Cache Representativeness in the Presence of Arbitrary Access Patterns”, ISORC 2016, 2016.

D. Griffin, Lesage, B., Bate, I., Soboczenski, F., and Davis, R. I., “Modelling Fault Dependencies when Execution Time Budgets are Exceeded”. In proceedings 23rd International Conference on Real-Time Networks and Systems (RTNS 2015), pp. 129-138, 2015.

P. Benedicte, Kosmidis, L., Quinones, E., Abella, J., and Cazorla, F. J., “Modeling the Confidence of Timing Analysis for Software Time Randomised Caches”, INDIN 2016, 2016.

P. Benedicte, Kosmidis, L., Quinones, E., Abella, J., and Cazorla, F. J., “Modeling the Con dence of Timing Analysis for Time Randomised Caches”, SIES 2016, 2016.

E. Diaz, Abella, J., Mezzetti, E., Agirre, I., Azkarate-askasua, M., Vardanega, T., and Cazorla, F. J., “Mitigating the Instrumentation Overhead of Measurement-Based Timing Analysis”. WCET 2016, 2016.

L. Kosmidis, Compagnin, D., Morales, D., Mezzetti, E., Quinones, E., Abella, J., Vardanega, T., and Cazorla, F. J., “Measurement-Based Timing Analysis of the AURIX Caches”. WCET 2016, 2016.

P. Ryan Conmy, Pearce, M., Ziccardi, M., Mezzetti, E., Vardanega, T., Anderson, J., Gianarro, A., Hernandez, C., and Cazorla, F. J., “Measurement-Based Probabilistic Timing Analysis: From Academia to Space Industry”, DASIA 2015, 2015.

D. Griffin, Lesage, B., Burns, A., and Davis, R. I., “Lossy Compression for Worst-Case Execution Time Analysis of PLRU Caches”, Real-Time Networks and Systems (RTNS). 2014.

I. Agirre, Azkarate-askasua, M., Perez, J., Hernandez, C., Abella, J., Vardanega, T., and Cazorla, F. J., “IEC-61508 SIL3-compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis”, DSD 2015, 2015.

J. Abella, Quinones, E., Wartel, F., Vardanega, T., and Cazorla, F. J., “Heart of Gold: Making the Improbable Happen to Extend Coverage in Probabilistic Timing Analysis”, in Proceedings 26th Euromicro Conference on Real-Time Systems (ECRTS14), 2014.

B. Lesage, Griffin, D., Bate, I., Soboczenski, F., and Davis, R. I., “A Framework For The Evaluation Of Measurement-based Timing Analyses”. In proceedings 23rd International Conference on Real-Time Networks and Systems (RTNS 2015), pp. 35-44, 2015.

L. Kosmidis, Quinones, E., Abella, J., Vardanega, T., Hernandez, C., Gianarro, A., Broster, I., and Cazorla, F. J., “Fitting Processor Architectures for Measurement-Based Probabilistic Timing Analysis”, 2016.

J. Abella, del Castillo, J., Cazorla, F. J., and Padilla, M., “Extreme value theory in computer sciences: The case of embedded safety-critical systems”. 6th International Conference on Risk Analysis (ICRA), 2015.

D. Compagnin, Mezzetti, E., and Vardanega, T., “Experimental evaluation of optimal schedulers based on partitioned proportionate fairness”, ECRTS 2015, 2015.

M. Ziccardi, Mezzetti, E., Vardanega, T., Abella, J., and Cazorla, F. J., “EPC: Extended Path Coverage for Measurement-based Probabilistic Timing Analysis”, RTSS 2015, 2015.

S. Altmeyer and Davis, R., “On the Correctness, Optimality and Precision of Static Probabilistic Timing Analysis”, in Proceedings Design, Automation and Test in Europe, Dresden, 2014.

G. Fernandez, Abella, J., Quinones, E., Rochange, C., Vardanega, T., and Cazorla, F. J., “Contention in multicore hardware shared resources: Understanding of the state of the art”. WCET 2014 workshop, 2014.

L. Kosmidis, Abella, J., Quinone, E., Wartel, F., Farrall, G., and Cazorla, F. J., “Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware”, in Proceedings 51st Design Automation Conference (DAC), California, 2014.

J. Abella, Hardy, D., Puaut, I., Quinones, E., and Cazorla, F. J., “On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques”, in Proceedings 26th Euromicro Conference on Real-Time Systems (ECRTS14), 2014.

J. Javier, Kosmidis, L., Abella, J., Quinones, E., and Cazorla, F. J., “Bus Designs for Time-Probabilistic Multicore Processors”, in Proceedings Design, Automation and Test in Europe, Dresden, Germany, 2014.

I. Bate, Burns, A., and Davis, R. I., “A Bailout Protocol for Mixed Criticality Systems”, ECRTS 2015, 2015.

I. Agirre, Azkarate-askasua, M., Larrucea, A., Perez, J., Vardanega, T., and Cazorla, F. J., “Automotive Safety Concept Definition for Mixed-Criticality Integration on a COTS Multicore”. SASSUR 2016, 2016.