Publications

Found 2 results

Filters: Author is Leonidas Kosmidis (BSC) [Clear All Filters]

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

P

L. K. (BSC), Quinones, E., Abella, J., Vardanega, T., Broster, I., and Cazorla, F. J., “Probabilistic Timing Analysis and Its Impact on Processor Architecture”, 2014.

T

M. S. (BSC), (BSC), L. K., Abella, J., Quinones, E., and Cazorla, F., “Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments”, in Special Issue on Harsh Chips, 2014.

Login

Copyright 2015 © proxima-project.eu. This project has received funding from the European Union’s Seventh Framework Programme for research, technological development and demonstration under grant agreement n°611085.