DAC 2016: "Predictable System Timing – Probab(ilistical)ly?"

Tuesday, June 7, 2016 (All day) to Thursday, June 9, 2016 (All day)


The predictability of system timing is a default requirement for automotive systems just like for other real-time embedded system application domains. Especially for mixed-criticality applications, the ability to predict timing behavior soundly and accurately gets crucial to system efficiency, so that higher loads can be sustained (as desired) while warranting availability, reliability and responsiveness for the correct execution of critical components of the system (as required).

Those application domains are also witnessing a surge in performance requirements, which reflects the increase in the value-added that software delivers to the system in those domains. The required levels of performance can only realistically be attained by employing high-performance hardware acceleration features such as cache hierarchies, multicore processors, etc. However, those features are increasingly complex for state-of-the-art worst-case execution time (WCET) analysis to handle with reasonable tightness and for affordable effort.

Thus, a novel technique called Measurement-Based Probabilistic Timing Analysis (MBPTA) for the timing analysis of mixed-criticality applications running on modern, high-performance computing platforms has been developed. Which MBPTA, the execution time of the application can be modelled accurately by a probability distribution. MBPTA provides WCET estimates for arbitrarily low probabilities of exceedance, termed probabilistic WCET (pWCET). A prerequisite for the use of probabilistic timing analysis is the selective injection of randomization effects across the execution stack of modern processors, transparent to the application, and with no effect on functional behavior. Randomization transforms unknown timing distributions, which would otherwise incur arbitrarily frequent pathological variations – source of possibly serious repercussions – into well-behaved distributions, whose extreme cases can quantifiably occur at arbitrarily low probability levels.


This panel aims at discussing advantages and recent progress of both, non-probabilistic and probabilistic approaches, and how they fit the industrial needs and practices in terms of timing verification, both from an application perspective as well as from a processor vendor perspective.


Background of this proposal is the current debate whether probabilistic timing analysis is actually viable for hard real-time embedded systems. The discussion between both camps is not really led openly with the exception of the papers by two of the panelists, why cache randomization is considered useful (http://ojs.dagstuhl.de/index.php/lites/article/view/LITES-v002-i001-a001) or harmful (http://ojs.dagstuhl.de/index.php/lites/article/view/LITES-v001-i001-a003) in real-time systems.


Marco di Natale (Scuola Superiore Sant’Anna, Pisa)


  • Jaume Abella (Barcelona Supercomputing Center) – probabilistic approach
  • Jan Reineke (U Saarland) – classic WCET approach
  • Arne Hamann (BOSCH) – automotive industry needs
  • Glenn Farrall (Infineon) – microcontroller vendor perspective