Publications

Found 9 results
Filters: First Letter Of Title is P  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
P
D. Compagnin, Mezzetti, E., and Vardanega, T., “Putting RUN into practice: implementation and evaluation”, in Proceedings 26th Euromicro Conference on Real-Time Systems (ECRTS14), 2014.
L. Kosmidis, Abella, J., Wartel, F., Quinones, E., Colin, A., and Cazorla, F. J., “PUB: Path Upper-Bounding for Measurement-Based Probabilistic Timing Analysis”, in Proceedings 26th Euromicro Conference on Real-Time Systems (ECRTS14), 2014.
M. Slijepcevic, Fernandez, M., Hernandez, C., Abella, J., Quinones, E., and Cazorla, F. J., “pTNoC: Time-Analyzable Scalable NoC Designs for Mixed-Criticality Multicore Embedded Systems”, DSD 2016, 2016.
F. J. Cazorla, Abella, J., Anderson, J., Vardanega, T., Vatrinet, F., Bate, I., Broster, I., Azkarate-askasua, M., Wartel, F., Cucu, L., Cros, F., Farrall, G., Gogonel, A., Gianarro, A., Triquet, B., and Hernand, C., “PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis”, DSD 2016, 2016.
“PROXIMA: A Probabilistic Approach to the Timing Behaviour of Mixed-Criticality Systems”, ADA USER JOURNAL, vol. 35, no. 2. pp. 118-122, 2014.
S. Altmeyer, Cucu-Grosjean, L., Davis, R. I., and Lesage, B., “Progress on static probabilistic timing analysis for systems with random cache replacement policies”. RTSOPS 2014, 2014.
L. K. (BSC), Quinones, E., Abella, J., Vardanega, T., Broster, I., and Cazorla, F. J., “Probabilistic Timing Analysis and Its Impact on Processor Architecture”, 2014.
L. Santinelli and Cucu-Grosjean, L., “A probabilistic calculus for probabilistic real-time systems”. ACM Transactions on Embedded Computing Systems, 2015.
S. Milutinovic, Quinones, E., Abella, J., and Cazorla, F. J., “PACO: Fast Average-Performance Estimation for Time-Randomized Caches”, 52nd Design Automation Conference (DAC), 2015.