Publications
Found 23 results
Filters: Author is Jaume Abella [Clear All Filters]
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“Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments”, in Special Issue on Harsh Chips, 2014.
, , , “Speeding up Static Probabilistic Timing Analysis”, in ARCS, 2015.
, “Resilient Random Modulo Cache Memories for Probabilistically-Analyzable Real-Time Systems”, IOLTS 2016, 2016.
, “Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems”. Leibniz Transactions on Embedded Systems (LITES), 2015.
, “pTNoC: Time-Analyzable Scalable NoC Designs for Mixed-Criticality Multicore Embedded Systems”, DSD 2016, 2016.
, “PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis”, DSD 2016, 2016.
, , “PACO: Fast Average-Performance Estimation for Time-Randomized Caches”, 52nd Design Automation Conference (DAC), 2015.
, “Modelling Probabilistic Cache Representativeness in the Presence of Arbitrary Access Patterns”, ISORC 2016, 2016.
, , “Modeling the Con dence of Timing Analysis for Time Randomised Caches”, SIES 2016, 2016.
, , “Measurement-Based Timing Analysis of the AURIX Caches”. WCET 2016, 2016.
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“Extreme value theory in computer sciences: The case of embedded safety-critical systems”. 6th International Conference on Risk Analysis (ICRA), 2015.
, , “Contention in multicore hardware shared resources: Understanding of the state of the art”. WCET 2014 workshop, 2014.
, “Analyzing TDMA and Round-Robin with MBPTA”, DSD 2015, 2015.
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